JPH0132143Y2 - - Google Patents
Info
- Publication number
- JPH0132143Y2 JPH0132143Y2 JP11037082U JP11037082U JPH0132143Y2 JP H0132143 Y2 JPH0132143 Y2 JP H0132143Y2 JP 11037082 U JP11037082 U JP 11037082U JP 11037082 U JP11037082 U JP 11037082U JP H0132143 Y2 JPH0132143 Y2 JP H0132143Y2
- Authority
- JP
- Japan
- Prior art keywords
- information
- data
- switch
- control device
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000005540 biological transmission Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
Landscapes
- Detection And Correction Of Errors (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Error Detection And Correction (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11037082U JPS5915143U (ja) | 1982-07-21 | 1982-07-21 | デイツプスイツチの情報チエツク回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11037082U JPS5915143U (ja) | 1982-07-21 | 1982-07-21 | デイツプスイツチの情報チエツク回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5915143U JPS5915143U (ja) | 1984-01-30 |
JPH0132143Y2 true JPH0132143Y2 (en]) | 1989-10-02 |
Family
ID=30256708
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11037082U Granted JPS5915143U (ja) | 1982-07-21 | 1982-07-21 | デイツプスイツチの情報チエツク回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5915143U (en]) |
-
1982
- 1982-07-21 JP JP11037082U patent/JPS5915143U/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5915143U (ja) | 1984-01-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0525736B1 (en) | Data storing system for a communication control circuit | |
JPH0132143Y2 (en]) | ||
JPH02294862A (ja) | 複数のプラグインモジュールを備えるコンピュータ | |
JPS6227409B2 (en]) | ||
JPS6361697B2 (en]) | ||
JP2830486B2 (ja) | 通信装置 | |
KR890002141Y1 (ko) | 16비트 dma콘트롤러의 32비트 데이타 신호 전송장치 | |
JPS6491235A (en) | Control system for counter circuit | |
JPH0581174A (ja) | Cpu装置のアクセス確認回路 | |
JPS6138665B2 (en]) | ||
JPS6230106Y2 (en]) | ||
JPS58140829A (ja) | 装置機番設定回路 | |
JPS59151245A (ja) | パリテイチエツクの変更方式 | |
JPS61151746A (ja) | デ−タエラ−の処理方法 | |
Rossi | Remote controlled B+ T train Pre/post scaler | |
JPH01288986A (ja) | メモリーカード | |
JPH0638239B2 (ja) | 誤り訂正機構 | |
JPH0460260B2 (en]) | ||
JPH0475154A (ja) | 縦続接続された端末装置のアドレス設定方式 | |
Iselin et al. | A data transfer system incorporating a PDP8 computer | |
JPH04288652A (ja) | 伝送装置用回路 | |
JPS5953947A (ja) | 入力デ−タ確認方式 | |
JPH05250153A (ja) | プログラム修正方式 | |
JPS6466769A (en) | Data processing having decentralized shared memories | |
JPS63199555A (ja) | 同一シエルフ番号監視装置 |